# $Id: makefile,v 1.7 2001/05/31 18:13:49 umoeller Exp $

#
# makefile:
#       makefile for src/main directory.
#       For use with IBM NMAKE, which comes with the IBM compilers,
#       the Developer's Toolkit, and the DDK.
#
#       All the makefiles have been restructured with V1.0.0.
#
#       Called from:    main makefile
#
#       Input:          ./*.cpp
#
#       Output:         ../bin/*.obj
#
#       Edit "setup.in" to set up the make process.
#

# Say hello to yourself.
!if [@echo +++++ Entering $(MAKEDIR)]
!endif

# include setup (compiler options etc.)
!include ..\..\setup.in

# FIXED MACROS
# ------------
#
# You probably need not change the following.
#

# Define the suffixes for files which NMAKE will work on.
# .SUFFIXES is a reserved NMAKE keyword ("pseudotarget") for
# defining file extensions that NMAKE will recognize in inference
# rules.
.SUFFIXES: .cpp .obj .h

# OUTPUTDIR specifies the directory where all the output .OBJ
# files will be created in.
OUTPUTDIR0 = $(PROJECT_OUTPUT_DIR)
OUTPUTDIR = $(OUTPUTDIR0)\exe_st

!if [@md $(OUTPUTDIR0) 2> NUL]
!endif
!if [@md $(OUTPUTDIR) 2> NUL]
!endif

# The OBJS macro contains all the .OBJ files which need to be
# created from the files in this directory.
# These will be put into BIN\.
OBJS = $(OUTPUTDIR)\wpi2exe.obj $(OUTPUTDIR)\launcher.obj

CC_HELPERS = $(CC_ST)

# The main target:
# If we're called from the main makefile, MAINMAKERUNNING is defined,
# and we'll set $(OBJS) as our targets (which will go on).
# Otherwise, we call the main makefile, which will again call ourselves later.
all:   \
!ifndef MAINMAKERUNNING
    callmainmake
!else
    $(OBJS)
!endif
    @echo ----- Leaving $(MAKEDIR)

callmainmake:
    @echo $(MAKEDIR)\makefile: Recursing to main makefile.
    @cd ..\..
    @nmake
    @echo $(MAKEDIR)\makefile: Returned from main makefile. Done.

# The "dep" target: run fastdep on the sources.
# "nmake dep" gets called from src\makefile if nmake dep
# is running on the main makefile.
dep:
    $(RUN_FASTDEP) *.cpp
    @echo ----- Leaving $(MAKEDIR)

# Now define inference rules for what to do with certain file
# types, based on their file extension.
# The syntax we need here is ".fromext.toext".
# So whenever NMAKE encounters a .toext file, it
# executes what we specify here.
# The ugly {} brackets are some awkward syntax for specifying
# files in other directories.

# Special macros used here: $(@B) is the current target w/out ext.

# -- compile C files to .OBJ files
#    The output will be placed in the directory specified by
#    the OUTPUTDIR variable (set above).
#
#    Note that we use CC_ST for single-thread libraries here.

.cpp.{$(OUTPUTDIR)}.obj:
        @echo $(MAKEDIR)\makefile: Compiling $(@B).cpp
!ifdef EMX
        $(CC) -o $(OUTPUTDIR)\$(@B).obj $(@B).cpp
!else
!ifndef PRECH
        $(CC_ST) /Fo$(OUTPUTDIR)\$(@B).obj $(@B).cpp
!else
        $(CC_ST) /fi"$(PRECH)\$(@B).pch" /si"$(PRECH)\$(@B).pch" /Fo$(OUTPUTDIR)\$(@B).obj $(@B).cpp
!endif
!endif

# The .OBJ-from-sources dependencies are now automatically
# created by "nmake dep" into the .depend include file.
# V0.9.12 (2001-05-30) [umoeller]

!ifndef NOINCLUDEDEPEND
!include .depend
!endif


